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Message-Id: <20090208.234502.197065045.davem@davemloft.net>
Date: Sun, 08 Feb 2009 23:45:02 -0800 (PST)
From: David Miller <davem@...emloft.net>
To: risto.suominen@...il.com
Cc: netdev@...r.kernel.org
Subject: Re: [PATCH 002/002] de2104x: support for systems lacking cache
coherence
From: Risto Suominen <risto.suominen@...il.com>
Date: Mon, 9 Feb 2009 09:27:49 +0200
> Add a configurable Descriptor Skip Length for systems that lack cache coherence.
>
> Signed-off-by: Risto Suominen <Risto.Suominen@...il.com>
I really don't see why this patch could possibly be necessary.
On systems that lack cache coherence:
1) {pci,dma}_alloc_{consistent,coherent}() give kernel mappings of
the buffer with the cache disabled. Therefore the device and
and cpu see the correct data.
2) {pci,dma}_{map,unmap}_{single,sg}() do the appropriate cache
flushing.
Explicit syncing between cpu and device can be performed
using {pci,dma}_sync_{single,sg}() as needed.
Therefore, this patch is superfluous.
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