netdev - Re: Marvell 88E609x switch?

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Message-Id: <1235991382.30736.62.camel@localhost.localdomain>
Date:	Mon, 02 Mar 2009 11:56:22 +0100
From:	Jesper Dangaard Brouer <jdb@...x.dk>
To:	Lennert Buytenhek <buytenh@...tstofly.org>
Cc:	Jesper Dangaard Brouer <hawk@...u.dk>,
	Gary Thomas <gary@...assoc.com>,
	netdev <netdev@...r.kernel.org>
Subject: Re: Marvell 88E609x switch?

On Fri, 2009-02-27 at 23:28 +0100, Lennert Buytenhek wrote:

> The main conclusion so far is that this write (net/dsa/mv88e6131.c):
> 
> 	/*
> 	 * MAC Forcing register: don't force link, speed, duplex
> 	 * or flow control state to any particular values.
> 	 */
>	REG_WRITE(addr, 0x01, 0x0003);

This sort of enables auto-detection of speed.

> isn't correct on ports that can either be CPU ports or external ports.

For external ports I had to enabled the PPU to allow the external PHYs
to negotiate.

Also, on external PHYs ports 8 and 9, I write 0x0403 not 0x0003 (to
register 0x1, PCS Control Register).  Which also enables inband
auto-negotiation, but I'm not sure this is necessary.


> Forcing the link up on the CPU port helps somewhat, but things aren't
> 100% working yet.

On the CPU port I force link-up and force speed+duplex setting.  I only
got 100Mbit/s to the CPU port...

/* CPU Port 10: Force 100Mbit Full-Duplex */
REG_WRITE( 0x1A , 0x01 , 0x003D );

You should write 0x003E ... see attached patch

-- 
Med venlig hilsen / Best regards
  Jesper Brouer
  ComX Networks A/S
  Linux Network developer
  Cand. Scient Datalog / MSc.
  Author of http://adsl-optimizer.dk
  LinkedIn: http://www.linkedin.com/in/brouer

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