| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <200904281048.15663.florian@openwrt.org> Date: Tue, 28 Apr 2009 10:48:14 +0200 From: Florian Fainelli <florian@...nwrt.org> To: Andrew Morton <akpm@...ux-foundation.org> Cc: Ayaz Abdulla <aabdulla@...dia.com>, manfred@...orfullife.com, davem@...emloft.net, netdev@...r.kernel.org Subject: Re: [PATCH] forcedeth: add clock gating feature Hi, Le Monday 27 April 2009 21:24:47 Andrew Morton, vous avez écrit : > On Mon, 27 Apr 2009 08:31:35 -0400 > > Ayaz Abdulla <aabdulla@...dia.com> wrote: > > This patch adds support for clock gating the tx/rx engines which is > > available on certain chipsets. > > What are the effects of this patch? Improved power management? Fixes > a user-visible bug? Something else? Clock gating is a design technique which improves power consumption by only clocking the necessary parts of the chip. Ayaz do you have any figures on how this patch reduces consumption ? -- Best regards, Florian Fainelli Email : florian@...nwrt.org http://openwrt.org ------------------------------- -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Powered by blists - more mailing lists