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Date: Tue, 19 May 2009 14:08:50 +0100 From: Antonio Almeida <vexwek@...il.com> To: Stephen Hemminger <shemminger@...tta.com> Cc: netdev@...r.kernel.org, jarkao2@...il.com, kaber@...sh.net, davem@...emloft.net, devik@....cz, Eric Dumazet <dada1@...mosbay.com> Subject: Re: HTB accuracy for high speed Do I have that TSC problem? On Tue, May 19, 2009 at 12:48 PM, Antonio Almeida <vexwek@...il.com> wrote: >> Are you using one of the AMD dual core machines? That processor has the bad >> design flaw that the TSC counter is not synced between core's so the kernel can't >> use it. You might even be better off running a non SMP kernel on that box. > > My machine has two dual cores AMD Opteron processor 280. Do I have > that TSC problem. > > > # dmesg | grep AMD > OEM ID: AMD Product ID: HAMMER APIC at: 0xFEE00000 > CPU0: AMD Dual Core AMD Opteron(tm) Processor 280 stepping 02 > CPU1: AMD Dual Core AMD Opteron(tm) Processor 280 stepping 02 > CPU2: AMD Dual Core AMD Opteron(tm) Processor 280 stepping 02 > CPU3: AMD Dual Core AMD Opteron(tm) Processor 280 stepping 02 > > > processor : 0 > vendor_id : AuthenticAMD > cpu family : 15 > model : 33 > model name : Dual Core AMD Opteron(tm) Processor 280 > stepping : 2 > cpu MHz : 2394.039 > cache size : 1024 KB > physical id : 0 > siblings : 2 > core id : 0 > cpu cores : 2 > fdiv_bug : no > hlt_bug : no > f00f_bug : no > coma_bug : no > fpu : yes > fpu_exception : yes > cpuid level : 1 > wp : yes > flags : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge > mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext > fxsr_opt lm 3dnowext 3dnow pni lahf_lm cmp_legacy ts fid vid ttp > bogomips : 4790.36 > clflush size : 64 > > > Antonio Almeida > -- To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
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