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Message-Id: <20090714.123848.189674670.davem@davemloft.net>
Date:	Tue, 14 Jul 2009 12:38:48 -0700 (PDT)
From:	David Miller <davem@...emloft.net>
To:	khc@...waw.pl
Cc:	netdev@...r.kernel.org
Subject: Re: Debounce code vs. dma_sync_single_range_for_cpu() and e100
 driver.

From: Krzysztof Halasa <khc@...waw.pl>
Date: Tue, 14 Jul 2009 21:34:01 +0200

> Well, e100 driver uses streaming mapping for it's RX/TX buffers as well
> as for the descriptors. Now it gets tricky - RX ring descriptors can be
> written by the device at any time (when completing RX) and at the same
> time the CPU has to be able to check the descriptor's status. It seems
> it can't be formally done with the streaming DMA API, since it doesn't
> provide invalidate and flush operations, it's rather about transfering
> control.
> 
> I guess the coherent/consistent allocations should be used for this
> purpose (= uncached RAM pages on IXP4xx if I understand it correctly).
> 
> Now that I know the inner working of DMA API the attached patch "fixes"
> the e100 problems, but it still doesn't seem to be a valid use of the
> API.

E100's use of streaming mappings for RX descriptors is a bug, it
should be using consistent mappings for sure.

And it's especially buggy if it isn't doing DMA API sync calls before
looking at descriptor fields, as your patch seems to cure.
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