netdev - Re: [PATCH] IXP42x HSS support for setting internal clock rate

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Message-Id: <20090907.015905.82274829.davem@davemloft.net>
Date:	Mon, 07 Sep 2009 01:59:05 -0700 (PDT)
From:	David Miller <davem@...emloft.net>
To:	khc@...waw.pl
Cc:	netdev@...r.kernel.org
Subject: Re: [PATCH] IXP42x HSS support for setting internal clock rate

From: Krzysztof Halasa <khc@...waw.pl>
Date: Sat, 05 Sep 2009 15:59:49 +0200

> HSS usually uses external clocks, so it's not a big deal. Internal clock
> is used for direct DTE-DTE connections and when the DCE doesn't provide
> it's own clock.
> 
> This also depends on the oscillator frequency. Intel seems to have
> calculated the clock register settings for 33.33 MHz (66.66 MHz timer
> base). Their settings seem quite suboptimal both in terms of average
> frequency (60 ppm is unacceptable for G.703 applications, their primary
> intended usage(?)) and jitter.
> 
> Many (most?) platforms use a 33.333 MHz oscillator, a 10 ppm difference
> from Intel's base.
> 
> Instead of creating static tables, I've created a procedure to program
> the HSS clock register. The register consists of 3 parts (A, B, C).
> The average frequency (= bit rate) is:
> 66.66x MHz / (A  + (B + 1) / (C + 1))
> The procedure aims at the closest average frequency, possibly at the
> cost of increased jitter. Nobody would be able to directly drive an
> unbufferred transmitter with a HSS anyway, and the frequency error is
> what it really counts.
...
> Signed-off-by: Krzysztof Hałasa <khc@...waw.pl>

Applied, thanks Krzysztof.
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