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Date:	Fri, 08 Jan 2010 00:51:31 -0800 (PST)
From:	David Miller <davem@...emloft.net>
To:	benli@...adcom.com
Cc:	netdev@...r.kernel.org, kalyanc@...are.com, mchan@...adcom.com
Subject: Re: [PATCH net-next] bnx2: Flush the register writes which setup
 the MSI-X table

From: "Benjamin Li" <benli@...adcom.com>
Date: Wed, 6 Jan 2010 16:07:23 -0800

> The MSI-X table size needs to be properly set before pci_enable_msix()
> is called.  But on certain machines, the writes are delayed and the
> MSI-X table size is incorrectly read.  By reading the
> BNX2_PCI_MSIX_CONTROL register, the writes are flushed and now
> ensure that the MSI-X table is set correctly before MSI-X
> is enable on the device.
> 
> This patch was originally diagnosed and authored by
> Kalyan Ram Chintalapati <kalyanc@...are.com>.
> 
> Signed-off-by: Benjamin Li <benli@...adcom.com>
> Signed-off-by: Kalyan Ram Chintalapati <kalyanc@...are.com>
> Signed-off-by: Michael Chan <mchan@...adcom.com>

Applied, thanks.
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