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Message-ID: <8bd0f97a1001182337w5b8bf071v1ec90a8a2f5949e5@mail.gmail.com>
Date:	Tue, 19 Jan 2010 02:37:24 -0500
From:	Mike Frysinger <vapier.adi@...il.com>
To:	Ben Hutchings <bhutchings@...arflare.com>
Cc:	"Hennerich, Michael" <Michael.Hennerich@...log.com>,
	netdev@...r.kernel.org, "David S. Miller" <davem@...emloft.net>,
	uclinux-dist-devel@...ckfin.uclinux.org
Subject: Re: [Uclinux-dist-devel] [PATCH] wireless: adf702x: new driver for 
	ADF7020/21 parts

On Tue, Dec 22, 2009 at 11:02, Ben Hutchings wrote:
> On Tue, 2009-12-22 at 11:46 +0000, Hennerich, Michael wrote:
>> >> +static irqreturn_t adf702x_rx_interrupt(int irq, void *dev_id)
>> >> +{
>> >[...]
>> >> +                  lp->rx_size = adf702x_getrxsize(lp, offset);
>> >> +                  if (offset == 1) {
>> >> +                          set_dma_x_count(lp->dma_ch_rx, lp->rx_size);
>> >> +                          set_dma_start_addr(lp->dma_ch_rx,
>> >> +                                  (unsigned long)lp->rx_buf);
>> >> +                  } else {
>> >> +                          lp->rx_buf[0] = lp->rx_buf[3];
>> >> +                          set_dma_x_count(lp->dma_ch_rx, lp->rx_size - 1);
>> >> +                          set_dma_start_addr(lp->dma_ch_rx,
>> >> +                                  (unsigned long)&lp->rx_buf[1]);
>> >> +                  }
>> >> +                  enable_dma(lp->dma_ch_rx);
>> >> +                  SSYNC();
>> >
>> >Is this some odd kind of memory barrier?
>>
>> Well - it's an instruction that ensures that the write buffers are flushed and all instructions executed.
>
> I suspect you only need a write memory barrier here (wmb()) not a
> pipeline flush.

it's not a pipeline flush, it's another Blackfin fun piece -- it does
a system sync with the DMA registers
-mike

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