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Message-ID: <20100129225404.GA12440@laped.iglesias.mooo.com>
Date: Fri, 29 Jan 2010 23:54:04 +0100
From: "Edgar E. Iglesias" <edgar.iglesias@...il.com>
To: David Daney <ddaney@...iumnetworks.com>
Cc: Felix Fietkau <nbd@...nwrt.org>, netdev@...r.kernel.org,
Lennert Buytenhek <buytenh@...tstofly.org>
Subject: Re: [PATCH] skbuff: align sk_buff::cb to 64 bit
On Fri, Jan 29, 2010 at 02:42:03PM -0800, David Daney wrote:
> Felix Fietkau wrote:
> > The alignment requirement for 64-bit load/store instructions on ARM is
> > implementation defined. Some CPUs (such as Marvell Feroceon) do not
> > generate an exception, if such an instruction is executed with an
> > address that is not 64 bit aligned.
> > In such a case, the Feroceon corrupts adjacent memory, which showed up
> > in my tests as a crash in the rx path of ath9k that only occured with
> > CONFIG_XFRM set. This crash happened, because the first field of the
> > mac80211 rx status info in the cb is an u64, and changing it corrupted
> > the skb->sp field.
> >
> > Signed-off-by: Felix Fietkau <nbd@...nwrt.org>
> > Cc: stable@...nel.org
> > ---
> > --- a/include/linux/skbuff.h
> > +++ b/include/linux/skbuff.h
> > @@ -329,7 +329,7 @@ struct sk_buff {
> > * want to keep them across layers you have to do a skb_clone()
> > * first. This is owned by whoever has the skb queued ATM.
> > */
> > - char cb[48];
> > + char cb[48] __attribute__((aligned(8)));
> >
>
>
> s/__attribute__((aligned(8)))/__aligned(8)/
>
> Could the same thing be achieved by swapping the order of the dev and
> tstamp fields instead of adding the alignment attribute?
>
> What is the sizeof(void *) on this thing?
I'd guess the problem is with the accessor to the thing.
something in the opaque cb ptr its beeing accessed wroingly causing
overwrites.
Cheers,
ed
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