netdev - Re: [PATCH v3] skbuff: align sk_buff::cb to 64 bit and close some potential holes

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Message-Id: <20100227.031727.143841315.davem@davemloft.net>
Date:	Sat, 27 Feb 2010 03:17:27 -0800 (PST)
From:	David Miller <davem@...emloft.net>
To:	nbd@...nwrt.org
Cc:	ddaney@...iumnetworks.com, eric.dumazet@...il.com,
	netdev@...r.kernel.org, buytenh@...tstofly.org
Subject: Re: [PATCH v3] skbuff: align sk_buff::cb to 64 bit and close some
 potential holes

From: Felix Fietkau <nbd@...nwrt.org>
Date: Tue, 23 Feb 2010 22:45:51 +0100

> The alignment requirement for 64-bit load/store instructions on ARM is
> implementation defined. Some CPUs (such as Marvell Feroceon) do not
> generate an exception, if such an instruction is executed with an
> address that is not 64 bit aligned. In such a case, the Feroceon
> corrupts adjacent memory, which showed up in my tests as a crash in the
> rx path of ath9k that only occured with CONFIG_XFRM set.
> 
> This crash happened, because the first field of the mac80211 rx status
> info in the cb is an u64, and changing it corrupted the skb->sp field.
> 
> This patch also closes some potential pre-existing holes in the sk_buff
> struct surrounding the cb[] area.
> 
> Signed-off-by: Felix Fietkau <nbd@...nwrt.org>
> Cc: stable@...nel.org

Applied, thanks for following up on this Felix.
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