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Date:	Sat, 27 Mar 2010 22:37:38 +0200
From:	Timo Teräs <timo.teras@....fi>
To:	François Romieu <romieu@...zoreil.com>
CC:	Ivan Vecera <ivecera@...hat.com>, netdev@...r.kernel.org
Subject: Re: r8169 mac reading/writing broken

Timo Teräs wrote:
> François Romieu wrote:
>> Timo Teräs <timo.teras@....fi> :
>> [...]
>>> It seems that adding single printk between writing MAC0 and MAC4 
>>> fixes it.
>>> I guess it needs a bit of delay between the writes or something.
>>
>> Can you test with a single RTL_R32 after each MACx write ?
> 
> Adding reading back of the written value fixes it too. Though,
> disassembly says that it added an extra instructions also (needs to
> load the 'high' from stack before writing it) so the added delay is
> probably slightly more than just the io read.

I'm not too familiar with PCI details, but this smells a bit
like that write-combining is happening and the NIC does not like
that.

Any ideas how to check this?

The system experiencing this is a "VIA Eden 1.2Ghz" box.

Or is swapping MAC0/MAC4 writes, or adding the extra read an
acceptable fix/workaround?

- Timo
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