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Date:	Sat, 27 Mar 2010 23:20:54 +0000
From:	Ben Hutchings <ben@...adent.org.uk>
To:	François Romieu <romieu@...zoreil.com>
Cc:	Timo Teräs <timo.teras@....fi>,
	Ivan Vecera <ivecera@...hat.com>, netdev@...r.kernel.org
Subject: Re: r8169 mac reading/writing broken

On Sat, 2010-03-27 at 22:11 +0100, François Romieu wrote:
> Timo Teräs <timo.teras@....fi> :
> [...]
> > Any ideas how to check this?
> 
> Check the datasheet of VIA's chipset for a WC control bit - there
> ought to be one - and disable it.
> 
> > Or is swapping MAC0/MAC4 writes, or adding the extra read an
> > acceptable fix/workaround?
> 
> swapping should reliably disable WC. It would be fine.

This bug was also reported by a Debian user in
<http://bugs.debian.org/573007>, also using a VIA chipset.

This sort of behaviour has been seen before with 64-bit registers
written in two 32-bit chunks, on some ARM platforms.  You worked around
that for the descriptor pointers with:

ommit b39fe41f481d20c201012e4483e76c203802dda7
Author: Francois Romieu <romieu@...zoreil.com>
Date:   Mon Sep 11 20:10:58 2006 +0200

    r8169: quirk for the 8110sb on arm platform

A similar problem seems to afflict the multicast hash register on this
platform - see <http://bugs.debian.org/407217>, and sorry I didn't
report this earlier when I got confirmation of my hypothesis.

I wonder whether there are special rules that need to be followed for
updating such registers and which the driver is not following, or a more
general bug in the Realtek chips that should be consistently
worked-around for all 64-bit registers.

Ben.

-- 
Ben Hutchings
Once a job is fouled up, anything done to improve it makes it worse.

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