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Message-Id: <20100428.124547.48527963.davem@davemloft.net>
Date:	Wed, 28 Apr 2010 12:45:47 -0700 (PDT)
From:	David Miller <davem@...emloft.net>
To:	bhutchings@...arflare.com
Cc:	netdev@...r.kernel.org, linux-net-drivers@...arflare.com
Subject: Re: [PATCH 06/17] sfc: Extend the legacy interrupt workarounds

From: Ben Hutchings <bhutchings@...arflare.com>
Date: Wed, 28 Apr 2010 20:28:27 +0100

> From: Steve Hodgson <shodgson@...arflare.com>
> 
> Siena has two problems with legacy interrupts:
>   1. There is no synchronisation between the ISR read completion,
>      and the interrupt deassert message.
>   2. A downstream read at the "wrong" moment can return 0, and
>      suppress generating the next interrupt.
> 
> Falcon should suffer from both of these, and it appears it does.
> Enable EFX_WORKAROUND_15783 on Falcon as well.
> 
> Also, when we see queues == 0, ensure we always schedule or rearm
> every event queue.
> 
> Signed-off-by: Ben Hutchings <bhutchings@...arflare.com>

Applied.
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