netdev - Re: [net-next-2.6 PATCH 1/2] e1000e: reset MAC-PHY interconnect on 82577/82578 during Sx->S0

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Message-Id: <20100506.012255.108783613.davem@davemloft.net>
Date:	Thu, 06 May 2010 01:22:55 -0700 (PDT)
From:	David Miller <davem@...emloft.net>
To:	jeffrey.t.kirsher@...el.com
Cc:	netdev@...r.kernel.org, gospo@...hat.com, bruce.w.allan@...el.com
Subject: Re: [net-next-2.6 PATCH 1/2] e1000e: reset MAC-PHY interconnect on
 82577/82578 during Sx->S0

From: Jeff Kirsher <jeffrey.t.kirsher@...el.com>
Date: Thu, 06 May 2010 01:00:06 -0700

> From: Bruce Allan <bruce.w.allan@...el.com>
> 
> During Sx->S0 transitions, the interconnect between the MAC and PHY on
> 82577/82578 can remain in SMBus mode instead of transitioning to the
> PCIe-like mode required during normal operation.  Toggling the LANPHYPC
> Value bit essentially resets the interconnect forcing it to the correct
> mode.
> 
> Signed-off-by: Bruce Allan <bruce.w.allan@...el.com>
> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@...el.com>

Applied.
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