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Message-ID: <4BF152E4.1060306@grandegger.com>
Date: Mon, 17 May 2010 16:29:56 +0200
From: Wolfgang Grandegger <wg@...ndegger.com>
To: Oliver Hartkopp <socketcan@...tkopp.net>
CC: David Miller <davem@...emloft.net>,
SocketCAN Core Mailing List <socketcan-core@...ts.berlios.de>,
Linux Netdev List <netdev@...r.kernel.org>, stable@...nel.org
Subject: Re: [PATCH] Fix SJA1000 command register writes on SMP systems
Hi Oliver,
On 05/17/2010 01:06 PM, Oliver Hartkopp wrote:
> The SJA1000 command register is concurrently written in the rx-path to free
> the receive buffer _and_ in the tx-path to start the transmission.
> On SMP systems this leads to a write stall in the tx-path, which can be
> solved by adding some locking for the command register in the SMP case.
We should explain why a write stall can happen. Here is the relavant
part from the SJA1000 data sheet, 6.4.4 COMMAND REGISTER (CMR):
"Between two commands at least one internal clock cycle is needed in
order to proceed. The internal clock is half of the external oscillator
frequency."
Wolfgang.
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