netdev - RE: IAMT broken by commit 82776a4bcd7aa5fbcd2e6339b3ce88b727dd40ab

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Message-ID: <8DD2590731AB5D4C9DBF71A877482A900118D29D0A@orsmsx509.amr.corp.intel.com>
Date:	Tue, 1 Jun 2010 16:33:27 -0700
From:	"Allan, Bruce W" <bruce.w.allan@...el.com>
To:	Aurelien Jarno <aurelien@...el32.net>,
	"Kirsher, Jeffrey T" <jeffrey.t.kirsher@...el.com>
CC:	"netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: RE: IAMT broken by commit 82776a4bcd7aa5fbcd2e6339b3ce88b727dd40ab

I will look into this in the next couple days.

-----Original Message-----
From: Aurelien Jarno [mailto:aurelien@...el32.net] 
Sent: Saturday, May 29, 2010 6:02 PM
To: Allan, Bruce W; Kirsher, Jeffrey T
Cc: netdev@...r.kernel.org
Subject: IAMT broken by commit 82776a4bcd7aa5fbcd2e6339b3ce88b727dd40ab

Hi,

I have recently upgrade my kernel, and found that Intel AMT support is
not working anymore as expected. I have configured IAMT so that is 
always available, even when the machine is off ("Desktop: ON in S0, S3,
S4-5").

On recent kernels, IAMT support does not work after the machine has 
been powered-off. Even worse, it also goes into this state when I try
to reboot it.

I have done a bisect and got this commit:

| commit 82776a4bcd7aa5fbcd2e6339b3ce88b727dd40ab
| Author: Bruce Allan <bruce.w.allan@...el.com>
| Date:   Fri Aug 14 14:35:33 2009 +0000
| 
|     e1000e: WoL does not work on 82577/82578 with manageability enabled
|     
|     With manageability (Intel AMT) enabled via BIOS, PHY wakeup does not get
|     configured on newer parts which use PHY wakeup vs. MAC wakeup which causes
|     WoL to not work.  The driver should configure PHY wakeup whether or not
|     manageability is enabled.
|     
|     Signed-off-by: Bruce Allan <bruce.w.allan@...el.com>
|     Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@...el.com>
|     Signed-off-by: David S. Miller <davem@...emloft.net>

I have tried to revert it on recent kernels (2.6.34), and IAMT is then
working as expected. My machine is using a Gigabyte EQ45M-S2 motherboard
with an 82567LM-3 ethernet chip (8086:10de), that is a different model
than the one of the original problem.

I do wonder if the changes in the patch should not only be done on some 
chip models, and I will appreciate any help in fixing this issue.

Thanks,
Aurelien

-- 
Aurelien Jarno                          GPG: 1024D/F1BCDB73
aurelien@...el32.net                 http://www.aurel32.net
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