netdev - Re: [net-next PATCH] bnx2x: Fix link problem with some DACs

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Message-ID: <20100614091818.GG25374@verge.net.au>
Date:	Mon, 14 Jun 2010 18:18:18 +0900
From:	Simon Horman <horms@...ge.net.au>
To:	Yaniv Rosner <yaniv.rosner@...adcom.com>
Cc:	"davem@...emloft.net" <davem@...emloft.net>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	Eilon Greenstein <eilong@...adcom.com>,
	"ole@....pl" <ole@....pl>
Subject: Re: [net-next PATCH] bnx2x: Fix link problem with some DACs

On Mon, Jun 14, 2010 at 02:04:17AM -0700, Yaniv Rosner wrote:
> Simon,
> The previous comment refers to HW limitation of older PHY version which is related only to write operation that we don't do anyhow.

Thanks for the clarification. In that case I have no objection.

> 
> Regards,
> Yaniv
> -----Original Message-----
> From: Simon Horman [mailto:horms@...ge.net.au] 
> Sent: Monday, June 14, 2010 11:50 AM
> To: Yaniv Rosner
> Cc: davem@...emloft.net; netdev@...r.kernel.org
> Subject: Re: [net-next PATCH] bnx2x: Fix link problem with some DACs
> 
> On Mon, Jun 14, 2010 at 01:26:28PM +0300, Yaniv Rosner wrote:
> > Change 2wire transfer rate of SFP+ module EEPROM from 400Khz to 100Khz since some DACs(direct attached cables) do not work at 400Khz.
> > 
> > Reported-by: Krzysztof Oldzki <ole@....pl>
> > Signed-off-by: Yaniv Rosner <yanivr@...adcom.com>
> > Signed-off-by: Eilon Greenstein <eilong@...adcom.com>
> > ---
> > diff --git a/drivers/net/bnx2x_link.c b/drivers/net/bnx2x_link.c
> > index ff70be8..600bc44 100644
> > --- a/drivers/net/bnx2x_link.c
> > +++ b/drivers/net/bnx2x_link.c
> > @@ -4266,14 +4266,15 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
> >  					       MDIO_PMA_REG_10G_CTRL2, 0x0008);
> >  			}
> >  
> > -			/* Set 2-wire transfer rate to 400Khz since 100Khz
> > -			is not operational */
> 
> Doesn't the above comment indicate there is some HW where 100Khz doesn't work?
> 
> > +			/* Set 2-wire transfer rate of SFP+ module EEPROM
> > +			to 100Khz since some DACs(direct attached cables) do
> > +			not work at 400Khz.*/
> >  			bnx2x_cl45_write(bp, params->port,
> >  				       ext_phy_type,
> >  				       ext_phy_addr,
> >  				       MDIO_PMA_DEVAD,
> >  				       MDIO_PMA_REG_8727_TWO_WIRE_SLAVE_ADDR,
> > -				       0xa101);
> > +				       0xa001);
> >  
> >  			/* Set TX PreEmphasis if needed */
> >  			if ((params->feature_config_flags &
> > 
> > 
> > 
> > --
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> 
> 
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