netdev - Re: [net-next-2.6 PATCH v2] x86: Align skb w/ start of cacheline on newer core 2/Xeon Arch

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Message-ID: <87tyojzbjm.fsf@basil.nowhere.org>
Date:	Thu, 01 Jul 2010 13:28:13 +0200
From:	Andi Kleen <andi@...stfloor.org>
To:	Jeff Kirsher <jeffrey.t.kirsher@...el.com>
Cc:	davem@...emloft.net, netdev@...r.kernel.org, gospo@...hat.com,
	bphilips@...ell.com, Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>,
	"H. Peter Anvin" <hpa@...or.com>, x86@...nel.org,
	Alexander Duyck <alexander.h.duyck@...el.com>
Subject: Re: [net-next-2.6 PATCH v2] x86: Align skb w/ start of cacheline on newer core 2/Xeon Arch

Jeff Kirsher <jeffrey.t.kirsher@...el.com> writes:


Sorry for the late comment.

>  
> +#ifdef CONFIG_MCORE2
> +/*
> + * We handle most unaligned accesses in hardware.  On the other hand
> + * unaligned DMA can be quite expensive on some Nehalem processors.
> + *
> + * Based on this we disable the IP header alignment in network drivers.
> + */
> +#define NET_IP_ALIGN	0
> +#endif
>  #endif /* _ASM_X86_SYSTEM_H */

The ifdef should be imho dropped and the option be made unconditional
for all x86. I am not aware of any x86 core where unalignment is really
slow. This would increase the chance of it actually working on many
configurations which do not necessarily optimize for Core2.

-Andi
-- 
ak@...ux.intel.com -- Speaking for myself only.
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