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Message-ID: <1279600823.2458.59.camel@edumazet-laptop>
Date: Tue, 20 Jul 2010 06:40:23 +0200
From: Eric Dumazet <eric.dumazet@...il.com>
To: Jeff Kirsher <jeffrey.t.kirsher@...el.com>
Cc: davem@...emloft.net, netdev@...r.kernel.org, gospo@...hat.com,
bphilips@...ell.com, Alexander Duyck <alexander.h.duyck@...el.com>
Subject: Re: [net-next-2.6 PATCH] e1000: allow option to limit number of
descriptors down to 48 per ring
Le lundi 19 juillet 2010 à 16:43 -0700, Jeff Kirsher a écrit :
> From: Alexander Duyck <alexander.h.duyck@...el.com>
>
> This change makes it possible to limit the number of descriptors down to 48
> per ring. The reason for this change is to address a variation on hardware
> errata 10 for 82546GB in which descriptors will be lost if more than 32
> descriptors are fetched and the PCI-X MRBC is 512.
>
> Signed-off-by: Alexander Duyck <alexander.h.duyck@...el.com>
> Tested-by: Emil Tantilov <emil.s.tantilov@...el.com>
> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@...el.com>
> ---
>
> drivers/net/e1000/e1000.h | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/e1000/e1000.h b/drivers/net/e1000/e1000.h
> index 40b62b4..65298a6 100644
> --- a/drivers/net/e1000/e1000.h
> +++ b/drivers/net/e1000/e1000.h
> @@ -86,12 +86,12 @@ struct e1000_adapter;
> /* TX/RX descriptor defines */
> #define E1000_DEFAULT_TXD 256
> #define E1000_MAX_TXD 256
> -#define E1000_MIN_TXD 80
> +#define E1000_MIN_TXD 48
> #define E1000_MAX_82544_TXD 4096
>
> #define E1000_DEFAULT_RXD 256
> #define E1000_MAX_RXD 256
> -#define E1000_MIN_RXD 80
> +#define E1000_MIN_RXD 48
> #define E1000_MAX_82544_RXD 4096
>
> #define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */
>
So this limit is a pure software one ?
Why not let an admin chose a lower limit if he wants to ?
I am asking because big ring sizes can be a latency source in some
workloads.
Thanks
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