netdev - Re: [MeeGo-Dev][PATCH v3] Topcliff: Update PCH

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Date:	Tue, 5 Oct 2010 19:21:56 +0900
From:	"Masayuki Ohtake" <masa-korg@....okisemi.com>
To:	"Wolfgang Grandegger" <wg@...ndegger.com>
Cc:	<andrew.chih.howe.khor@...el.com>, <qi.wang@...el.com>,
	<margie.foster@...el.com>, <netdev@...r.kernel.org>,
	<yong.y.wang@...el.com>, <linux-kernel@...r.kernel.org>,
	<socketcan-core@...ts.berlios.de>, <kok.howg.ewe@...el.com>,
	"Christian Pellegrin" <chripell@...e.org>,
	"Tomoya MORINAGA" <morinaga526@....okisemi.com>,
	<meego-dev@...go.com>, "David S. Miller" <davem@...emloft.net>,
	<joel.clark@...el.com>, "Samuel Ortiz" <sameo@...ux.intel.com>
Subject: Re: [MeeGo-Dev][PATCH v3] Topcliff: Update PCH_CAN driver to 2.6.35

Hi Wolfgang,

I could confirm below.
With FIFO mode, it is able to receive packet with in-order.
We are now implementing FIFO mode.

Thanks, Ohtake(OKISemi)

----- Original Message ----- 
From: "Wolfgang Grandegger" <wg@...ndegger.com>
To: "Masayuki Ohtake" <masa-korg@....okisemi.com>
Cc: <andrew.chih.howe.khor@...el.com>; <qi.wang@...el.com>; <margie.foster@...el.com>; <netdev@...r.kernel.org>;
<yong.y.wang@...el.com>; <linux-kernel@...r.kernel.org>; <socketcan-core@...ts.berlios.de>; <kok.howg.ewe@...el.com>;
"Christian Pellegrin" <chripell@...e.org>; "Tomoya MORINAGA" <morinaga526@....okisemi.com>; <meego-dev@...go.com>;
"David S. Miller" <davem@...emloft.net>; <joel.clark@...el.com>; "Samuel Ortiz" <sameo@...ux.intel.com>
Sent: Friday, October 01, 2010 9:40 PM
Subject: Re: [MeeGo-Dev][PATCH v3] Topcliff: Update PCH_CAN driver to 2.6.35


> On 10/01/2010 12:02 PM, Masayuki Ohtake wrote:
> > Hi Wolfgang Grandegger,
> >
> > Thank you for your comments.
> >
> > We will modify and re-post ASAP.
> >
> > I have a comment about below.
> >> In this driver you are using just *one* RX object. This means that the
> >> CPU must handle new messages as quickly as possible otherwise message
> >> losses will happen, right?. For sure, this will not make user's happy.
> >> Any chance to use more RX objects in FIFO mode?
> >
> > In case implementing with FIFO mode,
> > received packets may be our of order.
>
> Hm, FIFO means "First in First out"! It might be tricky to implement,
> though.
>
> > Because our CAN register access is slow.
> >
> > I am confirming our CAN HW spec and the possibility of our-of-order.
>
> I don't understand?
>
> Wolfgang.
>
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