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Message-ID: <8DD2590731AB5D4C9DBF71A877482A9001773F7AD6@orsmsx509.amr.corp.intel.com>
Date:	Thu, 16 Dec 2010 17:46:02 -0800
From:	"Allan, Bruce W" <bruce.w.allan@...el.com>
To:	Arthur Jones <arthur.jones@...erbed.com>
CC:	Ben Hutchings <bhutchings@...arflare.com>,
	"Kirsher, Jeffrey T" <jeffrey.t.kirsher@...el.com>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: RE: [PATCH] e1000e: workaround missing power down mii control bit
 on 82571

>-----Original Message-----
>From: Arthur Jones [mailto:arthur.jones@...erbed.com]
>Sent: Thursday, December 16, 2010 2:14 PM
>To: Allan, Bruce W
>Cc: Ben Hutchings; Kirsher, Jeffrey T; netdev@...r.kernel.org
>Subject: Re: [PATCH] e1000e: workaround missing power down mii control bit on
>82571
>
>> > It's the reset in e1000_set_settings() which ignores that we had previously
>> > powered off the Phy.  I'll go through the rest of the code and fix up this
>> > and any other occurrences of similar issues properly.
>>
>> Thanks for having a look!
>>
>> We do a read-modify-write there of
>> the PHY control register.  We take
>> the rest of the bits as being good,
>> but, for some reason we don't get the
>> power down bit (always reads back
>> zero).  Is this a known 82571 issue?
>> On 82574, e.g., we seem to get the
>> power down bit back when we read...
>
>BTW:  The 802.3 spec seems to indicate
>that this bit _should_ be readable even
>when the PHY is powered down (i.e.  this
>is a PHY bug)...
>
>Arthur
>
>>
>> Are you sure you want to spread that
>> 82571 specific logic all over the driver?
>>
>> Arthur

No, not a PHY bug.  One difference between 82571 and 82574 is during a
hardware reset (which is done by the ethtool command in your example
repro case), the reset on 82571 is a much more aggressive reset than on
82574 which causes the bit to be cleared automatically.

Bruce.
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