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Message-ID: <25658.1300987746@redhat.com>
Date: Thu, 24 Mar 2011 17:29:06 +0000
From: David Howells <dhowells@...hat.com>
To: Stanislaw Gruszka <sgruszka@...hat.com>
Cc: dhowells@...hat.com, Stephen Hemminger <shemminger@...tta.com>,
netdev@...r.kernel.org, Andrew Gallatin <gallatin@...i.com>,
Brice Goglin <brice@...i.com>
Subject: Re: [RFC] myri10ge: small rx_done refactoring
Stanislaw Gruszka <sgruszka@...hat.com> wrote:
> David, can you confirm that Staphen is correct?
Stephen is correct. The compiler is perfectly at liberty to merge the two
loads if the value being read is not marked volatile.
If you stick a barrier() in there between the reads, then I think the compiler
will be required to emit two load instructions. However, the _CPU_ is then
entitled to merge them.
If you don't want the CPU to merge them, you have to use smp_rmb() or smp_mb()
between.
However, the compiler is also allowed to re-read the variable (ie. emit two
load instructions) if it would otherwise have to save the value on the stack
to free up a register, unless the pointed to value is marked volatile.
If you want to ensure that the value is read once only, then you need to use
ACCESS_ONCE() or stick a read/full barrier of some degree after the read.
Note the use of a barrier implies a partial ordering between two memory
accesses in the same instruction stream. If you can't say which two memory
memory accesses you want to order, you probably shouldn't be using a barrier.
David
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