netdev - Re: ARM, AF_PACKET: caching problems on Marvell Kirkwood

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Message-ID: <20110506161753.GC20777@orbit.nwl.cc>
Date:	Fri, 6 May 2011 18:17:53 +0200
From:	Phil Sutter <phil@....cc>
To:	Andrew Lunn <andrew@...n.ch>
Cc:	linux-arm-kernel@...ts.infradead.org, netdev@...r.kernel.org,
	ne@...urth.eu, Johann Baudy <johann.baudy@...-log.net>,
	Lennert Buytenhek <kernel@...tstofly.org>,
	Nicolas Pitre <nico@...xnic.net>
Subject: Re: ARM, AF_PACKET: caching problems on Marvell Kirkwood

Hi,

On Thu, May 05, 2011 at 09:46:01PM +0200, Andrew Lunn wrote:
> I can reproduce it on a Kirkwood:
> 
> [    0.000000] CPU: Feroceon 88FR131 [56251311] revision 1 (ARMv5TE), cr=00053977

Thanks for the information. Seems like we have the same CPU:

| [    0.000000] CPU: Feroceon 88FR131 [56251311] revision 1 (ARMv5TE), cr=00053177
| [    0.000000] CPU: VIVT data cache, VIVT instruction cache

and it's actually VIVT, not VIPT as I wrote in an earlier mail.

Greetings, Phil
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