netdev - Re: [net-next 1/7] bna: Brocade 1860 IOC PLL, Reg Defs and ASIC Mode Changes

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Message-ID: <1316831427.28330.17.camel@Joe-Laptop>
Date:	Fri, 23 Sep 2011 19:30:26 -0700
From:	Joe Perches <joe@...ches.com>
To:	Rasesh Mody <rmody@...cade.com>
Cc:	davem@...emloft.net, netdev@...r.kernel.org,
	adapter_linux_open_src_team@...cade.com,
	Gurunatha Karaje <gkaraje@...cade.com>
Subject: Re: [net-next 1/7] bna: Brocade 1860 IOC PLL, Reg Defs and ASIC
 Mode Changes

On Fri, 2011-09-23 at 19:14 -0700, Rasesh Mody wrote:
> Add logic to set ASIC specfic interface in IOC, HW interface initialization
> APIs, mode based initialization and MSI-X resource allocation for 1860 with
> no asic block. Add new h/w specific register definitions and setup registers
> used by IOC logic.

trivia...

> +static struct { u32 hfn_mbox, lpu_mbox, hfn_pgn, hfn, lpu, lpu_read; }

I think it'd be better to use normal kernel declaration style,
c99 initializers and perhaps const too.

static const struct {
	u32	hfn_mbox;
	u32	lpu_mbox;
	u32	hfn_pgn;
	u32	hfn;
	u32	lpu;
	u32	lpu_read;
} ct2_reg[] = {
	etc...
	
[]
> +	if (port == 0) {
> +		ioc->ioc_regs.heartbeat = rb + CT2_BFA_IOC0_HBEAT_REG;
> +		ioc->ioc_regs.ioc_fwstate = rb + CT2_BFA_IOC0_STATE_REG;
> +		ioc->ioc_regs.alt_ioc_fwstate = rb + CT2_BFA_IOC1_STATE_REG;
> +		ioc->ioc_regs.ll_halt = rb + FW_INIT_HALT_P0;
> +		ioc->ioc_regs.alt_ll_halt = rb + FW_INIT_HALT_P1;
> +	} else {
> +		ioc->ioc_regs.heartbeat = (rb + CT2_BFA_IOC1_HBEAT_REG);
> +		ioc->ioc_regs.ioc_fwstate = (rb + CT2_BFA_IOC1_STATE_REG);
> +		ioc->ioc_regs.alt_ioc_fwstate = rb + CT2_BFA_IOC0_STATE_REG;
> +		ioc->ioc_regs.ll_halt = rb + FW_INIT_HALT_P1;
> +		ioc->ioc_regs.alt_ll_halt = rb + FW_INIT_HALT_P0;
> +	}

Inconsistent use of parentheses, I think it's better to remove them.

> +
> +	/*
> +	 * PSS control registers
> +	 */
> +	ioc->ioc_regs.pss_ctl_reg = (rb + PSS_CTL_REG);
> +	ioc->ioc_regs.pss_err_status_reg = (rb + PSS_ERR_STATUS_REG);
> +	ioc->ioc_regs.app_pll_fast_ctl_reg = (rb + CT2_APP_PLL_LCLK_CTL_REG);
> +	ioc->ioc_regs.app_pll_slow_ctl_reg = (rb + CT2_APP_PLL_SCLK_CTL_REG);

here too.

> +
> +	/*
> +	 * IOC semaphore registers and serialization
> +	 */
> +	ioc->ioc_regs.ioc_sem_reg = (rb + CT2_HOST_SEM0_REG);

etc.


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