netdev - Re: under-performing bonded interfaces

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <1321498314.2885.78.camel@deadeye>
Date:	Thu, 17 Nov 2011 02:51:54 +0000
From:	Ben Hutchings <bhutchings@...arflare.com>
To:	Simon Chen <simonchennj@...il.com>
CC:	Ben Greear <greearb@...delatech.com>, <netdev@...r.kernel.org>
Subject: Re: under-performing bonded interfaces

On Wed, 2011-11-16 at 20:38 -0500, Simon Chen wrote:
> Thanks, Ben. That's good discovery...
> 
> Are you saying that both 10G NICs are on the same PCIe x4 slot, so
> that they're subject to the 12G throughput bottleneck?

I assumed you were using 2 ports on the same board, i.e. the same slot.
If you were using 1 port each of 2 boards then I would have expected
them both to be usable at full speed.  So far as I can remember, PCIe
bridges are usually set up so there isn't contention for bandwidth
between slots.

Ben.

-- 
Ben Hutchings, Staff Engineer, Solarflare
Not speaking for my employer; that's the marketing department's job.
They asked us to note that Solarflare product names are trademarked.

--
To unsubscribe from this list: send the line "unsubscribe netdev" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html