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Message-Id: <D23C5FF8-F960-486D-9F11-5BCE61D0A9BC@kernel.crashing.org>
Date: Thu, 8 Dec 2011 01:23:36 -0600
From: Kumar Gala <galak@...nel.crashing.org>
To: Andy Fleming <afleming@...escale.com>
Cc: David Miller <davem@...emloft.net>, <netdev@...r.kernel.org>,
<linuxppc-dev@...ts.ozlabs.org>
Subject: Re: [PATCH] powerpc: Add TBI PHY node to first MDIO bus
On Dec 7, 2011, at 1:50 PM, Andy Fleming wrote:
> Systems which use the fsl_pq_mdio driver need to specify an
> address for TBI PHY transactions such that the address does
> not conflict with any PHYs on the bus (all transactions to
> that address are directed to the onboard TBI PHY). The driver
> used to scan for a free address if no address was specified,
> however this ran into issues when the PHY Lib was fixed so
> that all MDIO transactions were protected by a mutex. As it
> is, the code was meant to serve as a transitional tool until
> the device trees were all updated to specify the TBI address.
>
> The best fix for the mutex issue was to remove the scanning code,
> but it turns out some of the newer SoCs have started to omit
> the tbi-phy node when SGMII is not being used. As such, these
> devices will now fail unless we add a tbi-phy node to the first
> mdio controller.
>
> Signed-off-by: Andy Fleming <afleming@...escale.com>
> ---
>
> This requires fsl_pq_mdio: Clean up tbi address configuration from
> the net tree in order to achieve its full effect.
>
> This needs to go into 3.2.
>
> arch/powerpc/boot/dts/p1010rdb.dts | 5 +++++
> arch/powerpc/boot/dts/p1020rdb.dts | 5 +++++
> arch/powerpc/boot/dts/p1020rdb_camp_core0.dts | 5 +++++
> arch/powerpc/boot/dts/p1021mds.dts | 4 ++++
> arch/powerpc/boot/dts/p1022ds.dts | 4 ++++
> arch/powerpc/boot/dts/p2020rdb.dts | 8 ++++++--
> arch/powerpc/boot/dts/p2020rdb_camp_core0.dts | 4 ++++
> 7 files changed, 33 insertions(+), 2 deletions(-)
applied to merge
- k
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