netdev - RE: [PATCH net-next v2 2/4] can: cc770: add legacy ISA bus driver for the CC770 and AN82527

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Message-ID: <AE90C24D6B3A694183C094C60CF0A2F6D8AF31@saturn3.aculab.com>
Date:	Thu, 5 Jan 2012 12:00:37 -0000
From:	"David Laight" <David.Laight@...LAB.COM>
To:	"Wolfgang Grandegger" <wg@...ndegger.com>, <info@...ax.com>
Cc:	"Oliver Hartkopp" <socketcan@...tkopp.net>,
	<netdev@...r.kernel.org>, <linux-can@...r.kernel.org>,
	<socketcan-users@...ts.berlios.de>, "IreneV" <boir1@...dex.ru>,
	"Stanislav Yelenskiy" <stanislavelensky@...oo.com>
Subject: RE: [PATCH net-next v2 2/4] can: cc770: add legacy ISA bus driver for the CC770 and AN82527

> >>> -    outb(reg, base);
> >>> -    outb(val, base + 1);
> >>> +    outw( reg + ( val<<  8), base);
> >>
> >> That modification does fix your problem, right? The others above
don't
> >> help nor harm but we don't know if it's really realted to the same
> >> problem. I wll dig a bit deeper.
> > 
> > Exactly. The others above I removed because facing the opposite,
even
> > missing interrupts but then just to avoid other possible side
effects
> > and then assuming that they might be related.
> 
> OK. My concern: Can we be sure that 16bit accesses are always
supported
> by the hardware? Does a spinlock_irqsave/spinlock_irqrestore around
the
> 8bit accesses already help?

Hmmm... are there any register reads that need the
same 'double cycle' sequence ??
If so you need to stop reads being interleaved (with
themselves and writes) so requesting a 16bit access
doesn't help.

Which means you need a spinlock...

	David


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