netdev - Re: Bug in smsc911x

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Date:	Mon, 09 Jan 2012 17:23:03 +0000
From:	phil.edworthy@...esas.com
To:	netdev@...r.kernel.org
Cc:	"David S. Miller" <davem@...emloft.net>,
	Linus Walleij <linus.walleij@...aro.org>,
	Robert Marklund <robert.marklund@...ricsson.com>,
	Steve Glendinning <steve.glendinning@...c.com>
Subject: Re: Bug in smsc911x_init

Hi

> I've found that commit 3ac3546e5f17248d961ef0f4a27e75564bf71578, 
"net/smsc911x: Always wait for the chip to be ready" can cause init to 
fail. I am working on an out of tree board, but it will affect other 
users. With an smsc 9218 connected to a big endian processor using a 
16-bit bus, we have to wait for the value read from PMT_CTRL to be 0x10000 
rather than 0x1.
> 
> However, I am not sure what the correct test should be, as the data 
sheet states that you can't read or write to any other reg until the 
PMT_CTRL READY bit is set. Maybe we can poll until we get a valid result 
from reading BYTE_TEST, and then wait for the PMT_CTRL (endian specific) 
READY bit?

Whoops... please ignore. The problem was one of platform config data. For 
some reason this was set to SMSC911X_USE_32BIT, and somehow everything 
else except this new code in init works just fine.

Sorry about that,
Phil
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