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Message-ID: <1326437318.2617.17.camel@edumazet-laptop>
Date: Fri, 13 Jan 2012 07:48:38 +0100
From: Eric Dumazet <eric.dumazet@...il.com>
To: Steffen Klassert <steffen.klassert@...unet.com>
Cc: Herbert Xu <herbert@...dor.apana.org.au>,
Alexey Dobriyan <adobriyan@...il.com>,
linux-crypto@...r.kernel.org, netdev@...r.kernel.org,
ken@...elabs.ch
Subject: Re: sha512: make it work, undo percpu message schedule
Le vendredi 13 janvier 2012 à 07:22 +0100, Steffen Klassert a écrit :
> On Wed, Jan 11, 2012 at 11:36:11AM +1100, Herbert Xu wrote:
> > On Wed, Jan 11, 2012 at 03:00:40AM +0300, Alexey Dobriyan wrote:
> > > commit f9e2bca6c22d75a289a349f869701214d63b5060
> > > aka "crypto: sha512 - Move message schedule W[80] to static percpu area"
> > > created global message schedule area.
> > >
> > > If sha512_update will ever be entered twice, hilarity ensures.
> >
> > Hmm, do you know why this happens? On the face of it this shouldn't
> > be possible as preemption is disabled.
> >
>
> I did not try to reproduce, but this looks like a race of the 'local out'
> and the receive packet path. On 'lokal out' bottom halves are enabled,
> so could be interrupted by the NET_RX_SOFTIRQ while doing a sha512_update.
> The NET_RX_SOFTIRQ could invoke sha512_update too, that would corrupt the
> hash value. My guess could be checked easily by disabling the bottom halves
> before the percpu value is fetched.
Good catch. It can be generalized to any interrupts (soft and hard)
Another solution is using two blocks, one used from interrupt context.
static DEFINE_PER_CPU(u64[80], msg_schedule);
static DEFINE_PER_CPU(u64[80], msg_schedule_irq);
(Like we do for SNMP mibs on !x86 arches)
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