netdev - Re: [PATCH 03/10] stmmac: sanitize the rx coe and add the type-1 csum

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Message-ID: <4F7AAD4B.1010606@st.com>
Date:	Tue, 3 Apr 2012 13:26:59 +0530
From:	deepaksi <deepak.sikri@...com>
To:	Giuseppe CAVALLARO <peppe.cavallaro@...com>
Cc:	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"davem@...emloft.net" <davem@...emloft.net>,
	Srinivas KANDAGATLA <srinivas.kandagatla@...com>,
	spear-devel <spear-devel@...t.st.com>,
	Shiraz HASHIM <shiraz.hashim@...com>,
	Viresh KUMAR <viresh.kumar@...com>,
	"bhutchings@...arflare.com" <bhutchings@...arflare.com>
Subject: Re: [PATCH 03/10] stmmac: sanitize the rx coe and add the type-1
 csum

Ciao Peppe,

On 4/3/2012 12:19 PM, Giuseppe CAVALLARO wrote:
>
> [snip]
>> reset.
> Previously, the stmmac called the dwmac1000_rx_coe_supported to verify
> it could do the CSUM in Hw. If true the driver used the type 2 by default.
>
> I've voluntarily removed this function because not necessary anymore.
> In fact, YOU improved the rx_coe from the platform. If it is passed as
> STMMAC_RX_COE_NONE then it means the driver is not able to perform any
> csum for the incoming frames. This is actually used on old gmac/mac
> cores. In new cores, the HW cap register will be used to manage and fix
> this logic.
> I could restore the core you are mentioning  but just to do another
> safety check at run-time in case of the user provided a broken setting
> from the platform and there is not the HW cap register. Hmm, I do not
> know if this actually could help indeed... just an extra check IMHO.

These are the updates required in the code.

In function dwmac1000_core_init(), you may need to set the IPC bit based 
on the fact that
if rx_coe has been setup through the platform code.
This bit set is a must for the checksum offload to be enabled. Rest of 
the code looks good.

Deepak





>> I hope this clears the things a bit. Sorry for the miscommunication.
> No problem for the miscommunication ;-)
>
> Let me know
> Ciao
> Peppe
>
>> Rgds
>> Deepak
>>
>>
>>
>>
>>
>>
>>>> Regards
>>>> Deepak
>>>>
>>> .
>>>
>>
> .
>

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