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Date:	Sat, 7 Jul 2012 00:11:02 +0200
From:	Francois Romieu <romieu@...zoreil.com>
To:	Émeric Vigier 
	<emeric.vigier@...oirfairelinux.com>
Cc:	Steve Glendinning <steve@...well.net>,
	steve glendinning <steve.glendinning@...c.com>,
	netdev@...r.kernel.org, Nancy Lin <nancy.lin@...c.com>
Subject: Re: [PATCH] smsc95xx: support ethtool get_regs

Émeric Vigier <emeric.vigier@...oirfairelinux.com> :
[...]
> Yes, there are 16 bits wide according to smsc95xx.h.
> But other smsc drivers define 32bit wide PHY regs. I made myself believe
> that smsc would use the same PHY for each ethernet chip.

SMSC people would surely answer before I find the relevant datasheet.

Anyway the PHY registers are accessed indirectly through the MII_{ADDR, DATA}
registers and MII_DATA r/w mask is limited to the lower 16 bits.

> So would something like s/32 * sizeof(u32)/PHY_SPECIAL * sizeof(u16)/ solve the issue here?

You would have to pack data[] as well. Or use u16 *.

> Concerning the ioctl, I found ethtool much easier to use. And I believe
> smsc9514 is a very popular chipset, so this could help others debugging it.

# mii-tool -vv e1000
Using SIOCGMIIPHY=0x8947
e1000: no autonegotiation, 10baseT-HD, link ok
  registers for MII PHY 0: 
    1140 796d 0141 0c30 0de1 0021 0004 0000
    0000 0200 0000 0000 0000 0000 0000 3000
    0000 0000 0000 0000 0174 0000 0000 0000
    4100 0000 000d 000f 0000 0000 0000 0000
  product info: vendor 00:50:43, model 3 rev 0
  basic mode:   autonegotiation enabled
  basic status: autonegotiation complete, link ok
  capabilities: 1000baseT-FD 100baseTx-FD 100baseTx-HD 10baseT-FD 10baseT-HD
  advertising:  1000baseT-FD 100baseTx-FD 100baseTx-HD 10baseT-FD 10baseT-HD flow-control
  link partner: 10baseT-HD

It is not that bad for the first 32 PHY registers.

[...]
> Do you mean LTT? I am not familiar with it, I should have a look.

Documentation/trace/ftrace.txt

[...]
> I should change that in previous "for" loop as well I suppose?

You may.

-- 
Ueimor
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