netdev - RE: [PATCH net-next 01/11] sfc: Implement 128-bit writes for efx_writeo

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Message-ID: <AE90C24D6B3A694183C094C60CF0A2F6026B6F7D@saturn3.aculab.com>
Date:	Thu, 12 Jul 2012 09:45:05 +0100
From:	"David Laight" <David.Laight@...LAB.COM>
To:	"Ben Hutchings" <bhutchings@...arflare.com>,
	"David Miller" <davem@...emloft.net>
Cc:	<netdev@...r.kernel.org>, <linux-net-drivers@...arflare.com>
Subject: RE: [PATCH net-next 01/11] sfc: Implement 128-bit writes for efx_writeo_page

> From: netdev-owner@...r.kernel.org [mailto:netdev-
> owner@...r.kernel.org] On Behalf Of Ben Hutchings
> Sent: 12 July 2012 00:15
> To: David Miller
> Cc: netdev@...r.kernel.org; linux-net-drivers@...arflare.com
> Subject: [PATCH net-next 01/11] sfc: Implement 128-bit writes for
> efx_writeo_page
> 
> Add support for writing a TX descriptor to the NIC in one PCIe
> transaction on x86_64 machines.
...
> +static inline void _efx_writeo(struct efx_nic *efx, efx_le_128 value,
> +			       unsigned int reg)
> +{
...
> +}

Wouldn't it be better to put code this in some generic header
where it can be used by other drivers?

Some architectures/cpus have dma engines associated with the
PCIe interface than can be used to request longer PCIe transactions.

So you probably need a transfer length as well.

I suspect that it is never worth using an interrupt for
the completion of such dma - although splitting the request
and wait would allow the caller to overlap operations.

With a dma interface it is worth updating multiple ring
entries at one, and reading multiple entries for status.

	David