netdev - Re: [PATCH 2/3] x86_64: Define 128-bit memory-mapped I/O operations

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Message-ID: <CA+55aFyC6tpgABYq-PXAiPVzi_jMs3sCiebvg6YKEkE=mcEFyA@mail.gmail.com>
Date:	Wed, 22 Aug 2012 08:16:09 -0700
From:	Linus Torvalds <torvalds@...ux-foundation.org>
To:	David Laight <David.Laight@...lab.com>
Cc:	Ben Hutchings <bhutchings@...arflare.com>,
	"H. Peter Anvin" <hpa@...or.com>,
	David Miller <davem@...emloft.net>, tglx@...utronix.de,
	mingo@...hat.com, netdev@...r.kernel.org,
	linux-net-drivers@...arflare.com, x86@...nel.org
Subject: Re: [PATCH 2/3] x86_64: Define 128-bit memory-mapped I/O operations

On Wed, Aug 22, 2012 at 8:05 AM, David Laight <David.Laight@...lab.com> wrote:
>
> PCIe transfers are basically hdlc packets containing the address,
> command and any associated data. Unless they get bridged
> though some strange PCIe<->PCI<->PCIe system they are very
> unlikely to get broken up.

It's exactly the odd kind of "mix in a non-native PCIe bridge" setups
I'd worry about. But I guess that is pretty unlikely in any modern
machine (except for thunderbolt, and I think that's going to pass any
PCIe stuff through unchanged).

                  Linus
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