netdev - Re: alignment faults in 3.6

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Message-ID: <CAHkRjk70TNGA29AFq=oogx=UOVsS9dJOr0vLyx-di0STpoUHuQ@mail.gmail.com>
Date:	Thu, 11 Oct 2012 17:59:49 +0100
From:	Catalin Marinas <catalin.marinas@....com>
To:	Russell King - ARM Linux <linux@....linux.org.uk>
Cc:	Eric Dumazet <eric.dumazet@...il.com>,
	Jon Masters <jonathan@...masters.org>, netdev@...r.kernel.org,
	Måns Rullgård <mans@...sr.com>,
	David Laight <David.Laight@...lab.com>,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: alignment faults in 3.6

On 11 October 2012 11:32, Russell King - ARM Linux
<linux@....linux.org.uk> wrote:
> On Thu, Oct 11, 2012 at 12:22:06PM +0200, Eric Dumazet wrote:
>> I took a look, and I dont see why/how gcc could use a ldm instruction
>>
>> Doing so assumed the alignment of the structure was 8 bytes, but its
>> not.
>>
>> Networking stack mandates that IP headers are aligned on 4 bytes
>> boundaries, not 8 bytes.
>
> Err, no.  ldm is "load multiple" not "load double".  It loads multiple
> 32-bit registers, and its requirement for non-faulting behaviour is for
> the pointer to be 4 byte aligned.  However, "load double" requires 8
> byte alignment.

It got better with ARMv6 where LDRD/STRD only require 4 byte alignment
(the only 8 byte alignment is required by LDREXD/STREXD). But on ARMv5
LDRD/STRD 8 byte alignment is indeed required (otherwise
unpredictable).

-- 
Catalin
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