netdev - RE: [PATCH V2 0/7] support the cpts found on am335x devices

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Tue, 16 Oct 2012 16:33:55 +0000
From:	"N, Mugunthan V" <mugunthanvnm@...com>
To:	Richard Cochran <richardcochran@...il.com>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>
CC:	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	David Miller <davem@...emloft.net>,
	"Chemparathy, Cyril" <cyril@...com>,
	"Govindarajan, Sriramakrishnan" <srk@...com>
Subject: RE: [PATCH V2 0/7] support the cpts found on am335x devices

> -----Original Message-----
> From: Richard Cochran [mailto:richardcochran@...il.com]
> Sent: Tuesday, October 16, 2012 1:18 AM
> To: netdev@...r.kernel.org
> Cc: linux-arm-kernel@...ts.infradead.org; David Miller; Chemparathy,
> Cyril; N, Mugunthan V; Govindarajan, Sriramakrishnan
> Subject: [PATCH V2 0/7] support the cpts found on am335x devices
> 
> This patch series, based on linux-3.7-rc1 plus the fixes I posted
> today, adds support for the Common Platform Time Sync (CPTS) found on
> the popular BeagleBone. The code enables hardware time stamping and a
> PTP Hardware Clock.
> 
> Changes in V2
>    - Now uses device tree
>    - Actually works with vanilla kernel
> 
> This work has been tested using the linuxptp PTP stack, and it seems
> to be working quite well. One limitation of the hardware is that not
> possible to adjust the clock frequency. Even without with this
> capability, the driver will be still be useful for 802.1AS
> applications, since they typically use a free running clock.
> 
> There is one open issue with this driver which will hopefully soon be
> resolved. Time stamping only works on UDP packets. Although Layer 2 is
> supposed to work according to the TRM, I have not yet figured out
> how. The UDP only works when setting an undocumented bit, so maybe
> someone from TI can fill me in on this.
> 
> Thanks,
> Richard
> 
> 
> Richard Cochran (7):
>   cpsw: rename register banks to match the reference manual
>   cpsw: add missing fields to the CPSW_SS register bank.
>   cpsw: correct the CPSW_PORT register bank declaration
>   cpsw: add a common header file for regsiter declarations
>   cpts: introduce time stamping code and a PTP hardware clock.
>   cpsw: add a DT field for the cpts offset
>   cpsw: use the time stamping capabilities of the cpts
> 
>  Documentation/devicetree/bindings/net/cpsw.txt |   11 +-
>  arch/arm/boot/dts/am33xx.dtsi                  |    5 +-
>  drivers/net/ethernet/ti/Kconfig                |    8 +
>  drivers/net/ethernet/ti/Makefile               |    2 +-
>  drivers/net/ethernet/ti/cpsw.c                 |   84 ++++-
>  drivers/net/ethernet/ti/cpsw_reg.h             |   81 ++++
>  drivers/net/ethernet/ti/cpts.c                 |  468
> ++++++++++++++++++++++++
>  drivers/net/ethernet/ti/cpts.h                 |  148 ++++++++
>  include/linux/platform_data/cpsw.h             |    1 +
>  9 files changed, 788 insertions(+), 20 deletions(-)
>  create mode 100644 drivers/net/ethernet/ti/cpsw_reg.h
>  create mode 100644 drivers/net/ethernet/ti/cpts.c
>  create mode 100644 drivers/net/ethernet/ti/cpts.h
> 
> --
> 1.7.2.5

Richard

I had seen some issues with the patch series.

* CPTS will hold only LSB 32 bits of 64 bit Timer and the upper 32 bit
  time value has to be taken care by the software, but the time stamp
  which is passed to skb or PTP clock consist of only 32 bit time value
* CPTS interrupts should be utilized to service Half and Full roll over
  events as it is non sync events with respect to get/set time and PTP
  pkt Tx/Rx
* CPTS Time which is obtained from hardware is not actually a nano
  seconds as the CPTS ref clock is tied to 250MHz for AM335x.
* CPSW register mapping done in this patch series removes the CPSW
  driver support for previous version found in TI814x
* CPSW Time stamping is done only for port 0 and port 1 is not done

Regards
Mugunthan V N
--
To unsubscribe from this list: send the line "unsubscribe netdev" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html