netdev - Re: [PATCH V2 0/7] support the cpts found on am335x devices

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Message-ID: <20121017182714.GC2412@netboy.at.omicron.at>
Date:	Wed, 17 Oct 2012 20:27:15 +0200
From:	Richard Cochran <richardcochran@...il.com>
To:	"N, Mugunthan V" <mugunthanvnm@...com>
Cc:	"netdev@...r.kernel.org" <netdev@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	David Miller <davem@...emloft.net>,
	"Chemparathy, Cyril" <cyril@...com>,
	"Govindarajan, Sriramakrishnan" <srk@...com>
Subject: Re: [PATCH V2 0/7] support the cpts found on am335x devices

On Tue, Oct 16, 2012 at 11:11:29PM +0000, N, Mugunthan V wrote:
> 
> Yes, I do agree that driver handles it. As Half roll over and Full roll
> over events are not handled in the driver, I am just curious how will
> the misaligned TS would be handled and also in cpts set time, the Lower
> 32 bit time is written to CPTS counter

#include <linux/clocksource.h>

> Since we poll for the 32bit over flow for every HZ * 8 cycle, won't
> there be a system overhead. If the CPTS ref clock is changed according
> to the ptp freq adjust api, how will the timecounter take care of change
> in frequency

There is nothing to do here. What are you asking?

> The current driver which is in vanilla kernel doesn't use extended slave
> address which are conflict between TI814x CPSW IP version and AM335x CPSW
> IP version. I have just posted my version of CPTS implementation. May be
> we can work together make the driver compatible with both CPSW versions

Okay.

> Since CPSW is a 3port Switch we should not fix time stamping will be enabled
> only for slave 0 or passing slave number through DT. Its better if we
> can configure both the slaves. This can be tested with EVM-sk which has
> both the slave ports pinned out.

I hope that you meant, "better if we can configure _either_ slave."
Considering how SO_TIMESTAMPING works, you can't use both at once.

Thanks,
Richard
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