netdev - Re: [RFC PATCH v2 2/6] PM / Runtime: introduce pm_runtime_set_memalloc

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Message-ID: <20121024132603.6c52cc47@pyramind.ukuu.org.uk>
Date:	Wed, 24 Oct 2012 13:26:03 +0100
From:	Alan Cox <alan@...rguk.ukuu.org.uk>
To:	"David Laight" <David.Laight@...LAB.COM>
Cc:	"Ming Lei" <ming.lei@...onical.com>,
	"Alan Stern" <stern@...land.harvard.edu>,
	<linux-kernel@...r.kernel.org>, "Oliver Neukum" <oneukum@...e.de>,
	"Minchan Kim" <minchan@...nel.org>,
	"Greg Kroah-Hartman" <gregkh@...uxfoundation.org>,
	"Rafael J. Wysocki" <rjw@...k.pl>, "Jens Axboe" <axboe@...nel.dk>,
	"David S. Miller" <davem@...emloft.net>,
	"Andrew Morton" <akpm@...ux-foundation.org>,
	<netdev@...r.kernel.org>, <linux-usb@...r.kernel.org>,
	<linux-pm@...r.kernel.org>, <linux-mm@...ck.org>
Subject: Re: [RFC PATCH v2 2/6] PM / Runtime: introduce
 pm_runtime_set_memalloc_noio()

On Wed, 24 Oct 2012 10:06:36 +0100
"David Laight" <David.Laight@...LAB.COM> wrote:

> > Looks the problem is worse than above, not only bitfields are affected, the
> > adjacent fields might be involved too, see:
> > 
> >            http://lwn.net/Articles/478657/
> 
> Not mentioned in there is that even with x86/amd64 given
> a struct with the following adjacent fields:
> 	char a;
> 	char b;
> 	char c;
> then foo->b |= 0x80; might do a 32bit RMW cycle.

There are processors that will do this for the char case at least as they
do byte ops by a mix of 32bit ops and rotate.

> This will (well might - but probably does) happen
> if compiled to a 'BTS' instruction.
> The x86 instruction set docs are actually unclear
> as to whether the 32bit cycle might even be misaligned!
> amd64 might do a 64bit cycle (not checked the docs).

Even with a suitably aligned field the compiler is at liberty to generate
things like

	reg = 0x80
	reg |= foo->b
	foo->b = reg;

One reason it's a good idea to use set_bit/test_bit and friends.

Alan
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