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Message-Id: <20121109.160850.901809648224300452.davem@davemloft.net>
Date: Fri, 09 Nov 2012 16:08:50 -0500 (EST)
From: David Miller <davem@...emloft.net>
To: steve.glendinning@...well.net
Cc: netdev@...r.kernel.org
Subject: Re: [PATCH 2/2] smsc95xx: set MII_BUSY bit to read/write PHY regs
From: Steve Glendinning <steve.glendinning@...well.net>
Date: Tue, 6 Nov 2012 10:08:53 +0000
> The device datasheet specifies the BUSY bit must be set when reading
> or writing phy registers. This patch ensures we do that.
>
> Signed-off-by: Steve Glendinning <steve.glendinning@...well.net>
Steve please let me know why you only submitted patch #2
of an apparent 2 part series.
If I don't get a response soon I'm just going to toss this
patch instead of letting it simply rot in patchwork.
Thanks.
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