netdev - [PATCH v2 0/3] net/macb: fixes to use core on Zynq SoCs

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Message-Id: <1364461627-26521-1-git-send-email-s.trumtrar@pengutronix.de>
Date:	Thu, 28 Mar 2013 10:07:04 +0100
From:	Steffen Trumtrar <s.trumtrar@...gutronix.de>
To:	netdev@...r.kernel.org
Cc:	Nicolas Ferre <nicolas.ferre@...el.com>,
	Steffen Trumtrar <s.trumtrar@...gutronix.de>
Subject: [PATCH v2 0/3] net/macb: fixes to use core on Zynq SoCs

Hi!

The Cadence GEM is also licensed for the Xilinx Zynq7000 SoCs.
As Xilinx uses other reset defaults, some fixes are necessary to have it
working there. And as the Zynq is dualcore, the clk_enables/disables now need
to be atomic.

Changes in v2:
	- only 3/3 was changed to correctly use the atomic clk_[en|dis]able

Regards,
Steffen

Steffen Trumtrar (3):
  net/macb: clear tx/rx completion flags in ISR
  net/macb: force endian_swp_pkt_en to off
  net/macb: make clk_enable atomic

 drivers/net/ethernet/cadence/macb.c | 24 ++++++++++++++----------
 drivers/net/ethernet/cadence/macb.h |  2 ++
 2 files changed, 16 insertions(+), 10 deletions(-)

-- 
1.8.2.rc2

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