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Message-ID: <51542531.9010300@atmel.com>
Date: Thu, 28 Mar 2013 12:10:41 +0100
From: Nicolas Ferre <nicolas.ferre@...el.com>
To: Steffen Trumtrar <s.trumtrar@...gutronix.de>,
<netdev@...r.kernel.org>, David Miller <davem@...emloft.net>
Subject: Re: [PATCH v2 0/3] net/macb: fixes to use core on Zynq SoCs
On 03/28/2013 10:07 AM, Steffen Trumtrar :
> Hi!
>
> The Cadence GEM is also licensed for the Xilinx Zynq7000 SoCs.
> As Xilinx uses other reset defaults, some fixes are necessary to have it
> working there. And as the Zynq is dualcore, the clk_enables/disables now need
> to be atomic.
>
> Changes in v2:
> - only 3/3 was changed to correctly use the atomic clk_[en|dis]able
>
> Regards,
> Steffen
On the whole series:
Acked-by: Nicolas Ferre <nicolas.ferre@...el.com>
Thanks, best regards.
> Steffen Trumtrar (3):
> net/macb: clear tx/rx completion flags in ISR
> net/macb: force endian_swp_pkt_en to off
> net/macb: make clk_enable atomic
>
> drivers/net/ethernet/cadence/macb.c | 24 ++++++++++++++----------
> drivers/net/ethernet/cadence/macb.h | 2 ++
> 2 files changed, 16 insertions(+), 10 deletions(-)
>
--
Nicolas Ferre
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