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Message-ID: <51599156.7000802@cogentembedded.com>
Date: Mon, 01 Apr 2013 17:53:26 +0400
From: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
To: netdev@...r.kernel.org
CC: nobuhiro.iwamatsu.yj@...esas.com, linux-sh@...r.kernel.org
Subject: Re: [PATCH 2/2] sh_eth: workaround for spurious ECI interrupt
Hello.
On 31-03-2013 23:54, Sergei Shtylyov wrote:
> At least on Renesas R8A7778, EESR.ECI interrupt seems to fire regardless of its
> mask in EESIPR register. I can 100% reproduce it with the following scenario:
> target is booted with 'ip=on' option, and so IP-Config opens SoC Ether device
> but doesn't get a proper reply and then succeeds with on-board SMC chip; then
> I login and try to bring up the SoC Ether device with 'ifconfig', and I get
> an ECI interrupt once request_irq() is called by sh_eth_open() (while interrupt
> mask in EESIPR register is all 0), if that interrupt is accompanied by a pending
> EESR.FRC (frame receive completion) interrupt, I get kernel oops in sh_eth_rx()
> because sh_eth_ring_init() hasn't been called yet!
> The solution I worked out is the following: in sh_eth_interrupt(), mask the
> interrupt status from EESR register with the interrupt mask from EESIPR register
> in order not to handle the disabled interrupts -- but forcing EESIPR.M_ECI bit
> in this mask set because we always need to fully handle EESR.ECI interrupt in
> sh_eth_error() in order to quench it (as it doesn't get cleared by just writing
> 1 to the this bit as all the other interrupts).
> While at it, remove unneeded initializer for 'intr_status' variable and give it
> *unsigned long* type, matching the type of sh_eth_read()'s result; fix comment.
> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@...entembedded.com>
> Reviewed-by: Max Filippov <max.filippov@...entembedded.com>
Though maybe writing 0 to ECSIPR (feLic interrupt mask) register in
sh_eth_close() could have prevented the spurious interrupts too, masking all
its primary sources -- I should have tried it beforehand. Still can try though...
WBR, Sergei
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