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Date:	Wed, 17 Apr 2013 12:49:10 +0200
From:	Sebastian Andrzej Siewior <bigeasy@...utronix.de>
To:	Mugunthan V N <mugunthanvnm@...com>
CC:	Richard Cochran <richardcochran@...il.com>, netdev@...r.kernel.org,
	"David S. Miller" <davem@...emloft.net>,
	Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [PATCH] net/cpsw: don't disable_irqs() after an interrupt has
 been received.

On 04/17/2013 12:08 PM, Mugunthan V N wrote:
> Mine shows [    0.000000] AM335X ES2.0 (neon )
> 
> In Beagle bone (silicon revision 1.0) there is a bug in CPSW irq in
> Silicon, please refer
> http://www.ti.com/lit/er/sprz360e/sprz360e.pdf  Advisory 1.0.9
> 
> Beagle bone black has Silicon revision 2.0 where the bug is fixed and
> you are able
> to test it properly and it hangs in my bone black as the IRQ is properly
> connected
> to A8

Okay. This would explain things. So let me try it again without
breaking the new one. If you disable_irq() there is no need to mask the
source in chip, right?

> 
> Regards
> Mugunthan V N

Sebastian
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