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Message-ID: <517CC2A8.5010303@mellanox.com>
Date: Sun, 28 Apr 2013 09:33:12 +0300
From: Amir Vadai <amirv@...lanox.com>
To: Richard Cochran <richardcochran@...il.com>
CC: "David S. Miller" <davem@...emloft.net>, <netdev@...r.kernel.org>,
Or Gerlitz <ogerlitz@...lanox.com>,
Eugenia Emantayev <eugenia@...lanox.com>
Subject: Re: [PATCH net-next V3 3/5] net/mlx4_en: Add HW timestamping (TS)
support
On 25/04/2013 22:26, Richard Cochran wrote:
> On Tue, Apr 23, 2013 at 07:06:49PM +0300, Amir Vadai wrote:
>
>> +u64 mlx4_en_get_cqe_ts(struct mlx4_cqe *cqe)
>> +{
>> + u64 hi, lo;
>> + struct mlx4_ts_cqe *ts_cqe = (struct mlx4_ts_cqe *)cqe;
>> +
>> + lo = (u64)be16_to_cpu(ts_cqe->timestamp_lo);
>> + hi = ((u64)be32_to_cpu(ts_cqe->timestamp_hi) + !lo) << 16;
> ^^^^^
> That looks a bit strange. Can you explain?
We need to increment the high order 32bit by one when the low order
16bit value is zero, due to HW limitation.
>
>> +
>> + return hi | lo;
>> +}
>
> Thanks,
> Richard
>
Amir.
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