netdev - RE: [PATCH] net: ethernet: xilinx_emaclite: keep protocol selector bits by reading ANAR

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <AE90C24D6B3A694183C094C60CF0A2F6026B7251@saturn3.aculab.com>
Date:	Tue, 28 May 2013 17:22:07 +0100
From:	"David Laight" <David.Laight@...LAB.COM>
To:	"Jens Renner (EFE)" <renner@...-gmbh.de>, <netdev@...r.kernel.org>
Cc:	<davem@...emloft.net>
Subject: RE: [PATCH] net: ethernet: xilinx_emaclite: keep protocol selector bits by reading ANAR

> This patch reads the PHY's MII_ADVERTISE register (ANAR) before modifying it.
> Hence, the protocol selector bits (4:0) which indicate IEEE 803.3u support are
> prevented from being cleared.
> ...
>                 /* Advertise only 10 and 100mbps full/half duplex speeds */
> -               phy_write(lp->phy_dev, MII_ADVERTISE, ADVERTISE_ALL);
> +               adv = phy_read(lp->phy_dev, MII_ADVERTISE);
> +               if (adv < 0)
> +                       return adv;
> +               phy_write(lp->phy_dev, MII_ADVERTISE, adv | ADVERTISE_ALL);

Given the comment shouldn't this be removing some bits?

It is a long time since I read the definitions of the ANAR (etc).
But I remember it having at least 5 bits defined for 10M and 100M
operation (including 100T4), so the reference to keeping bits (4:0)
seems confusing.

	David