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Date:	Fri, 21 Jun 2013 17:22:34 +0100
From:	"David Laight" <David.Laight@...LAB.COM>
To:	"Joe Perches" <joe@...ches.com>, "Arnd Bergmann" <arnd@...db.de>
Cc:	"Alexey Brodkin" <Alexey.Brodkin@...opsys.com>,
	<netdev@...r.kernel.org>,
	"Andy Shevchenko" <andy.shevchenko@...il.com>,
	"Francois Romieu" <romieu@...zoreil.com>,
	"Vineet Gupta" <Vineet.Gupta1@...opsys.com>,
	"Mischa Jonker" <Mischa.Jonker@...opsys.com>,
	"Grant Likely" <grant.likely@...aro.org>,
	"Rob Herring" <rob.herring@...xeda.com>,
	"Paul Gortmaker" <paul.gortmaker@...driver.com>,
	"David S. Miller" <davem@...emloft.net>,
	<linux-kernel@...r.kernel.org>,
	<devicetree-discuss@...ts.ozlabs.org>,
	"Florian Fainelli" <florian@...nwrt.org>
Subject: RE: [PATCH v7] ethernet/arc/arc_emac - Add new driver

> So it should be declared dma_addr_t then,
> 
> > +               addr = dma_map_single(&ndev->dev, (void *)rx_buff->skb->data,
> > +                                     buflen, DMA_FROM_DEVICE);
> > +               if (dma_mapping_error(&ndev->dev, addr)) {
> > +                       if (net_ratelimit())
> > +                               netdev_err(ndev, "cannot dma map\n");
> > +                       dev_kfree_skb(rx_buff->skb);
> > +                       stats->rx_errors++;
> > +                       continue;
> > +               }
> > +               dma_unmap_addr_set(&rx_buff, mapping, addr);
> > +               dma_unmap_len_set(&rx_buff, len, buflen);
> > +
> > +               rxbd->data = (unsigned char *)cpu_to_le32(rx_buff->skb->data);
> >
> > the 'addr' returned by dma_map_single is what the device really
> > needs, although it is the same as rx_buff->skb->data with the
> > trivial definition of dma_map_single.
> >
> > The last line here needs to be
> >                 rxbd->data = cpu_to_le32(addr);
> >
> > which fixes the bug, and has no dependency on a 32 bit CPU.
> 
> It still has a dependency on dma_addr_t size being 32 bit

No - just a dependency on memory being mapped to a 32bit
physical address accessible from the device.
Many 64 bit systems have devices that can only access 32bit
address space, either the memory has to be allocated from the
correct arena, of DMA bounce buffers are used.

	David



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