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Message-Id: <1380356521-3432-1-git-send-email-murzin.v@gmail.com>
Date: Sat, 28 Sep 2013 10:22:00 +0200
From: Vladimir Murzin <murzin.v@...il.com>
To: linuxppc-dev@...ts.ozlabs.org
Cc: netdev@...r.kernel.org, davem@...emloft.net,
benh@...nel.crashing.org, paulus@...ba.org, matt@...abs.org,
edumazet@...gle.com, dborkman@...hat.com,
Vladimir Murzin <murzin.v@...il.com>
Subject: [PATCH v2 1/2] powerpc: net: filter: fix DIVWU instruction opcode
Currently DIVWU stands for *signed* divw opcode:
7d 2a 4b 96 divwu r9,r10,r9
7d 2a 4b d6 divw r9,r10,r9
Use the *unsigned* divw opcode for DIVWU.
Suggested-by: Vassili Karpov <av1474@...tv.ru>
Reviewed-by: Vassili Karpov <av1474@...tv.ru>
Signed-off-by: Vladimir Murzin <murzin.v@...il.com>
Acked-by: Matt Evans <matt@...abs.org>
---
Changelog
v1->v2
Added credit to Vassili Karpov (malc) who kindly reviewed generated assembly
[1] and highlighted usage of signed division.
Note: temporary, for technical reason, he's not able to receive email.
[1]http://www.mail-archive.com/linuxppc-dev@lists.ozlabs.org/msg71635.html
arch/powerpc/include/asm/ppc-opcode.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index eccfc16..0a4a683 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -171,7 +171,7 @@
#define PPC_INST_MULLW 0x7c0001d6
#define PPC_INST_MULHWU 0x7c000016
#define PPC_INST_MULLI 0x1c000000
-#define PPC_INST_DIVWU 0x7c0003d6
+#define PPC_INST_DIVWU 0x7c000396
#define PPC_INST_RLWINM 0x54000000
#define PPC_INST_RLDICR 0x78000004
#define PPC_INST_SLW 0x7c000030
--
1.8.1.5
--
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