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Message-Id: <20131009.140244.1085107412533674383.davem@davemloft.net>
Date: Wed, 09 Oct 2013 14:02:44 -0400 (EDT)
From: David Miller <davem@...emloft.net>
To: claudiu.manoil@...escale.com
Cc: netdev@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org
Subject: Re: [PATCH 1/3] gianfar: Enable eTSEC-A002 erratum w/a for all
parts
From: Claudiu Manoil <claudiu.manoil@...escale.com>
Date: Wed, 9 Oct 2013 20:20:40 +0300
> A002 is still in "no plans to fix" state, and applies to all
> the current P1/P2 parts as well, so it's resonable to enable
> its workaround by default, for all the soc's with etsec.
> The impact of not enabling this workaround for affected parts
> is that under certain conditons (runt frames or even frames
> with RX error detected at PHY level) during controller reset,
> the controller might fail to indicate Rx reset (GRS) completion.
>
> Signed-off-by: Claudiu Manoil <claudiu.manoil@...escale.com>
Applied.
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