netdev - [PATCH v2 2/2] net: emaclite: add barriers to support Xilinx Zynq platform

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Message-Id: <1386403849-3153-2-git-send-email-sthokal@xilinx.com>
Date:	Sat,  7 Dec 2013 13:40:49 +0530
From:	Srikanth Thokala <sthokal@...inx.com>
To:	netdev@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Cc:	davem@...emloft.net, michal.simek@...inx.com,
	Srikanth Thokala <sthokal@...inx.com>
Subject: [PATCH v2 2/2] net: emaclite: add barriers to support Xilinx Zynq platform

This patch adds barriers at appropriate places to ensure the driver
works on Xilinx Zynq ARM-based SoC platform.

Signed-off-by: Srikanth Thokala <sthokal@...inx.com>
---
Changes in v2:
	rebased on v3.13.0-rc3.
        added comments for memory barrier.
---
 drivers/net/ethernet/xilinx/xilinx_emaclite.c |   13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/drivers/net/ethernet/xilinx/xilinx_emaclite.c b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
index b2850fd..fefb8cd 100644
--- a/drivers/net/ethernet/xilinx/xilinx_emaclite.c
+++ b/drivers/net/ethernet/xilinx/xilinx_emaclite.c
@@ -220,6 +220,13 @@ static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr,
 		*to_u16_ptr++ = *from_u16_ptr++;
 		*to_u16_ptr++ = *from_u16_ptr++;
 
+		/* This barrier resolves occasional issues seen around
+		 * cases where the data is not properly flushed out
+		 * from the processor store buffers to the destination
+		 * memory locations.
+		 */
+		wmb();
+
 		/* Output a word */
 		*to_u32_ptr++ = align_buffer;
 	}
@@ -235,6 +242,12 @@ static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr,
 		for (; length > 0; length--)
 			*to_u8_ptr++ = *from_u8_ptr++;
 
+		/* This barrier resolves occasional issues seen around
+		 * cases where the data is not properly flushed out
+		 * from the processor store buffers to the destination
+		 * memory locations.
+		 */
+		wmb();
 		*to_u32_ptr = align_buffer;
 	}
 }
-- 
1.7.9.5

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