netdev - Re: [PATCH] net:cpsw: Pass unhandled ioctl's on to generic phy ioctl

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Message-ID: <52F24786.3020306@ti.com>
Date:	Wed, 5 Feb 2014 19:45:34 +0530
From:	Mugunthan V N <mugunthanvnm@...com>
To:	Christian Riesch <christian.riesch@...cron.at>,
	"Sørensen, Stefan" 
	<Stefan.Sorensen@...ctralink.com>,
	"ben@...adent.org.uk" <ben@...adent.org.uk>
CC:	"davem@...emloft.net" <davem@...emloft.net>,
	"netdev@...r.kernel.org" <netdev@...r.kernel.org>
Subject: Re: [PATCH] net:cpsw: Pass unhandled ioctl's on to generic phy ioctl

On Wednesday 05 February 2014 04:19 PM, Christian Riesch wrote:
> On 2014-02-05 09:18, Mugunthan V N wrote:
>> On Wednesday 05 February 2014 12:58 PM, Sørensen, Stefan wrote:
>>> The CPSW only supports timestamping which is only one part of the PTP
>>> functionality. Some PHYs (like the dp83630 that we use with the CPSW)
>>> also has external event generation and detection.
>> CPSW also has External event detection upto 4 events and newer SoCs upto
>> 8 events, currently no boards came with this pins pinned out, so it is
>> not supported as of now. If we have a board design with this we can
>> support external event generation.
>
> But for external event generation it would be useful to adjust the
> clock frequency of the PHC. IIRC this is broken on some silicon like
> the AM335x, right?
>

Yes, I agree but it is fixed in future SoCs like DRA7xx and AM43xx

Regards
Mugunthan V N
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