netdev - [PATCH 2/2] ixgbe, don't assume mapping of numa node cpus

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Date:	Mon, 24 Feb 2014 13:51:53 -0500
From:	Prarit Bhargava <prarit@...hat.com>
To:	netdev@...r.kernel.org
Cc:	Prarit Bhargava <prarit@...hat.com>,
	Jeff Kirsher <jeffrey.t.kirsher@...el.com>,
	Jesse Brandeburg <jesse.brandeburg@...el.com>,
	Bruce Allan <bruce.w.allan@...el.com>,
	Carolyn Wyborny <carolyn.wyborny@...el.com>,
	Don Skidmore <donald.c.skidmore@...el.com>,
	Greg Rose <gregory.v.rose@...el.com>,
	Alex Duyck <alexander.h.duyck@...el.com>,
	John Ronciak <john.ronciak@...el.com>,
	Mitch Williams <mitch.a.williams@...el.com>,
	"David S. Miller" <davem@...emloft.net>, nhorman@...hat.com,
	agospoda@...hat.com, e1000-devel@...ts.sourceforge.net
Subject: [PATCH 2/2] ixgbe, don't assume mapping of numa node cpus

The ixgbe driver assumes that the cpus on a node are mapped 1:1 with the
indexes into arrays.  This is not the case as nodes can contain, for
example, cpus 0-7, 33-40.

This patch fixes this problem.

Signed-off-by: Prarit Bhargava <prarit@...hat.com>
Cc: Jeff Kirsher <jeffrey.t.kirsher@...el.com>
Cc: Jesse Brandeburg <jesse.brandeburg@...el.com>
Cc: Bruce Allan <bruce.w.allan@...el.com>
Cc: Carolyn Wyborny <carolyn.wyborny@...el.com>
Cc: Don Skidmore <donald.c.skidmore@...el.com>
Cc: Greg Rose <gregory.v.rose@...el.com>
Cc: Alex Duyck <alexander.h.duyck@...el.com>
Cc: John Ronciak <john.ronciak@...el.com>
Cc: Mitch Williams <mitch.a.williams@...el.com>
Cc: "David S. Miller" <davem@...emloft.net>
Cc: nhorman@...hat.com
Cc: agospoda@...hat.com
Cc: e1000-devel@...ts.sourceforge.net
---
 drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c |   16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c
index 3668288..8b3992e 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_lib.c
@@ -794,11 +794,15 @@ static int ixgbe_alloc_q_vector(struct ixgbe_adapter *adapter,
 {
 	struct ixgbe_q_vector *q_vector;
 	struct ixgbe_ring *ring;
-	int node = NUMA_NO_NODE;
-	int cpu = -1;
+	int node = adapter->pdev->dev.numa_node;
+	int cpu, set_affinity = 0;
 	int ring_count, size;
 	u8 tcs = netdev_get_num_tc(adapter->netdev);
 
+	if (node == NUMA_NO_NODE)
+		cpu = -1;
+	else
+		cpu = cpumask_next(v_idx - 1, cpumask_of_node(node));
 	ring_count = txr_count + rxr_count;
 	size = sizeof(struct ixgbe_q_vector) +
 	       (sizeof(struct ixgbe_ring) * ring_count);
@@ -807,10 +811,8 @@ static int ixgbe_alloc_q_vector(struct ixgbe_adapter *adapter,
 	if ((tcs <= 1) && !(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) {
 		u16 rss_i = adapter->ring_feature[RING_F_RSS].indices;
 		if (rss_i > 1 && adapter->atr_sample_rate) {
-			if (cpu_online(v_idx)) {
-				cpu = v_idx;
-				node = cpu_to_node(cpu);
-			}
+			if (likely(cpu_online(cpu)))
+				set_affinity = 1;
 		}
 	}
 
@@ -822,7 +824,7 @@ static int ixgbe_alloc_q_vector(struct ixgbe_adapter *adapter,
 		return -ENOMEM;
 
 	/* setup affinity mask and node */
-	if (cpu != -1)
+	if (set_affinity)
 		cpumask_set_cpu(cpu, &q_vector->affinity_mask);
 	q_vector->numa_node = node;
 
-- 
1.7.9.3

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